The present invention is directed to a method of testing digital-to-analog and analog-to-digital converters and to an integrated circuit including a digital-to-analog converter or an analog-to-digital converter that is adapted for testing the converter.
Digital-to-analog converters (‘DACs’) convert a digital input signal to an analog output signal. Analog-to-digital converters (‘ADCs’) convert an analog input signal to a digital output signal. One technology that is used for DACs and ADCs, known as resistor ladder, uses a set of repetitive resistor elements across which a reference voltage is applied to form voltage or current dividers. The successive taps of the divider generate successive stepwise varying voltages. In a DAC, the taps are selected by switches controlled as a function of the digital input signal to generate the DAC analog output signal. A successive approximations register ADC may include a resistor ladder DAC, to which a digital signal is applied and adjusted until the analog output of the resistor ladder DAC becomes equal to the analog input signal to be converted, the digital signal applied to the resistor ladder DAC then becoming the output of the ADC.
The DAC or ADC may include a single set of repetitive resistor elements of identical resistance. However, the DAC or ADC may include two sets of repetitive resistor elements, the resistor elements of one set having a different resistance from the elements of the other set. The coarse steps defined by the resistor elements of one set are larger than the fine steps defined by the resistor elements of the other set. The taps of the fine step set are selected by less significant bits of the digital input signal in order to interpolate between the voltages at the taps of the coarse step set, which are selected by more significant bits of the digital input signal. The DAC or ADC may even include more than two such sets of repeating resistor elements of respective different resistances. A DAC or ADC of this kind is referred to as a coarse-fine DAC or ADC.
The accuracy and functionality of such circuits requires testing at design verification stages, system verification stages and also during production of integrated circuits (‘ICs’) including the DACs or ADCs. Testing such mixed-signal circuits presents difficulties and, in particular is both expensive and time-consuming. To facilitate testing, the ICs including the DACs or ADCs may include built-in self-test (‘BIST’) features enabling stimulus generation and measurements to be performed in the IC. The main purpose of BIST is to reduce the complexity, and thereby decrease the cost of the tests and to reduce reliance upon external (pattern-programmed) test equipment. BIST features reduce test-cycle duration and reduce the complexity of the test/probe setup, by reducing the number of input/output (‘I/O’) signals that must be driven or examined under tester control. Both lead to a reduction in the cost of automated test equipment (‘ATE’) service.